深圳市太航半导体有限公司

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深圳市太航半导体有限公司

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供应全新 原装 现货 ADCLK954BCPZ
供应全新 原装 现货 ADCLK954BCPZ
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供应全新 原装 现货 ADCLK954BCPZ

厂家:

###

封装:

原厂封装

描述:

OPTOISO 5KV 1CH GATE DRIVER 6SO

数量:

500000

原厂标准:

无铅/符合限制有害物质指令(RoHS)规范要求

产品信息

EVALUATION BOARD HARDWARE

RECOMMENDED BOARD SETUP

The recommended setup for the ADCLK954 evaluation board

is shown in Figure 2. VCC is set to 3.3 V and VEE is set to GND.

The CLKSEL jumper (P2) is provided to select the desired input

configuration.

On the evaluation board, Input CLK0 and Input CLK0 are set

up for dc-coupled operation to the ADCLK954 via J2 and J4.

This input configuration requires the user to provide the appropriate

ac swing and common-mode voltage to both inputs. Refer

to the ADCLK954 data sheet for input specifications.

CLK1 is set up to evaluate with a single-ended source via the

balun on the evaluation board. In addition, series capacitors in

the path provide ac-coupled inputs to the ADCLK954. The

common-mode voltage for both inputs is provided by tying

VREF1 and VT1 together. This connection is made with R14

installed at the factory.

The range of the peak-to-peak input voltage swing at CLK1 is

0.2 V p-p to 1.7 V p-p. Note that output jitter performance is

degraded by an input slew rate, as shown in the data sheet.

Table 1. Basic Equipment Required

Quantity Description

1 Single power supply

1 Signal source

1 High bandwidth oscilloscope

1 High bandwidth differential probe (optional)

4 Matched high speed cables